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Panasonic Corporation has developed a sheet-form encapsulation material (CV2008 series) for coreless package substrates that enables thinner-profile and lower-cost semiconductor packages.
The sheet-form encapsulation material, scheduled for mass production from June 2016, is optimized for the insulation layers of coreless package substrates. Its suitability for large-area encapsulation allows thinner packages to be manufactured at lower cost.
- A sheet-form encapsulation material with a uniformly produced insulation layer thickness is ideal for the new coreless process*1, as it eliminates the need for laser drilling processing. The insulation layer for a package substrate can be produced using a large-area press process, enabling the mass production of packages at lower cost.
– Sheet thickness is available in the range of 20 – 200 µm. - The high rigidity of the thin sheet encapsulation material minimizes any warpage of packages and contributes to a thinner profile. Modulus of elasticity: 17000 MPa at 25°C.
A low shrinkage rate of material ensures connection reliability to be maintained during high-temperature reflow processes, increasing the production yield of the package assembly process.